The present invention relates to semiconductor device fabrication, and more specifically, to nanosheet channel-to-source and drain isolation.
As semiconductor integrated circuits (ICs) or chips become smaller, stacked nanosheets, which are two-dimensional nanostructures with a thickness range on the order of 1 to 100 nanometers, are increasingly used. Nanosheets and nanowires are seen as a feasible device option for 7 nanometer and beyond scaling of semiconductor devices. The general process flow for nanosheet formation involves removing sacrificial layers of silicon germanium (SiGe) between the silicon (Si) sheets.